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DSP/FPGA Design Engineer, Top Secret Cleared (179)

Location : Littleton, CO
Job Type : Temp/Contract
Reference Code : 00184
Hours : Full Time
Required Years of Experience : 10
Required Education : BSEE
Job Category : Manufacturing-Engineering

Job Description :











































Job Title DSP/FPGA Design Engineer, Top Secret Cleared
Location Littleton, CO
Job Number 179/184
Residency US Citizens Only
Clearance Active Top Secret
Duration 12-15 Month Contract
Pay Rate $115/hr
Per diem Yes split available that can net about 1000 extra per month to cover lodging
Overtime Unknown details at interview
Shifts 1st

 


We are hiring for an ASIC FPGA/DSP contract development expert for our aerospace Top Secret Program. Candidate will create more cost effective automated processes and develop scripts to ease/streamline FPGAs. Contractor will be expected to bring with them the knowledge of how to make such improvements, and have strong collaborative abilities that show a history of working with system architects, RF or digital design teams, and being able to create strong designs that can be presented and implemented in our environment.


 


Daily duties will consist of developing, simulating, verifying, testing, integrating high speed products. Will be working with DSPs for a system on chip (SOC) using FPGA as the platform, using UVM/OVM, C/C++ and OOP tools and principles. Applicant will also perform component selection, evaluation, test box design, prototype creation and checkout along with digital and analog analysis. Engineer will design and develop evaluation boards and test methodologies/interface hardware required to evaluate the design through systems integration, test and final device design and customer approval.


 


Required:
*10+ years’ experience, conducting digital design engineering on DSPs using FPGAs
*Active Top Secret Clearance (TS/SCI), US Candidates only please
*Experience using VHDL/System Verilog for developing FPGAs.
*Familiar with OVM/UVM, high speed communications, DSP integrations
*Knowledge of System Verilog, SOCs, and embedded C/C++
*Able to get a Secret Clearance; Apply for after start; US Citizens ONLY
*On site work only, no remote work possible for this position.
*BSEE


 


Pluses:
*Familiar with MathLab/Simulink, Synopsis Synplify or VCS, NCSim, ChipScope.
*comfortable with Xilinx, Altera and model based compilers
*SIL/Software lab integration skills


 


Benefits:
*Five medical plans to choose from
*Optical and dental plan offerings
*Direct deposit payroll
*Overtime paid at time and 1/2 over 40 hours
*Per diem may be available for out of town contractors


 


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